q2K BHP
Black History Portal
THE BHP WIRE —
HIDDEN TRUTHS
What's New!
THE JOURNEY THROUGH TIME

Explore Black History

Explore the people, places, events, achievements, struggles and stories that shaped our journey.

✊🏾

Civil Rights

Movements, leaders, victories and the continuing fight for equality.

⚙️

Black Inventors

Innovation, patents, science, technology and world-changing contributions.

🏆

Sports

Pioneers, champions, Negro Leagues, records, activism and excellence.

♟️

People

Meet the people whose lives, choices and achievements shaped the journey.

📍

Places

Black towns, communities, institutions and places where history happened.

📜

Events

Moments that changed communities, movements, institutions and the nation.

Enter a person, place, event, or topic.
MY'STORY

The MOVE Fire

This is a personal recollection on the Move fire on May 13, 1985 Philadelphia police fired thousands of rounds at the MOVE house, city officials approved dropping an explosive device on the roof, the resulting fire was allowed to burn, 11 people—including five children—died, and 61 homes were destroyed. Philadelphia City Council later called it a “brutal attack carried out by the City of Philadelphia on its own citizens” and acknowledged that no individual faced criminal consequences for the bombing. One timeline correction worth preserving for the BHP record: the major previous MOVE-police confrontation was August 8, 1978, about seven years before the bombing, not a year or two earlier. Officer James Ramp was killed, other police and firefighters were wounded, nine MOVE members were later convicted, and television cameras recorded police beating Delbert Africa during his arrest. The 1985 MOVE Commission later specifically criticized city planners for failing to adequately use lessons from that 1978 confrontation. And that actually strengthens the point you’re making: 1985 did not happen without precedent or institutional memory. There had already been a deadly confrontation with MOVE, years of conflict, negotiations and police involvement before Osage Avenue.

MORE →
BLACK FACTS
The Truths They Never Taught You...

Wilmington 1898 — An American Coup

Wilmington, North Carolina once had a thriving Black middle class and an elected interracial government. In 1898 white supremacists used violence to overthrow that government, kill Black residents and drive many others from the city.

MORE →
BHP gathered finds from its connected research sources. Showing the 4 strongest Black History matches.
← BACK TO RESULTS
Wikipedia

ARM Cortex-R

Arm Cortex-R
Mediatek MT6280A Arm Cortex-R4
General information
Designed byArm Ltd.
Architecture and classification
Instruction setArmv7-R, Armv8-R,
Arm (32-bit),
Arm (64-bit),
Thumb (16-bit)

The ARM Cortex-R is a family of 32-bit and 64-bit RISC ARM processor cores licensed by ARM Ltd. The cores are optimized for hard real-time and safety-critical applications. Cores in this family implement the ARM Real-time (R) profile, which is one of three architecture profiles, the other two being the Application (A) profile implemented by the Cortex-A family and the Microcontroller (M) profile implemented by the Cortex-M family. The ARM Cortex-R family of microprocessors currently consists of the Cortex-R4(F), Cortex-R5(F), Cortex-R7(F), Cortex-R8(F), Cortex-R52(F), Cortex-R52+(F), and the Cortex-R82(F).

Overview

[edit]
32-bit
Year Core
2006 Cortex-R4(F)
2011 Cortex-R5(F)
2011 Cortex-R7(F)
2016 Cortex-R8(F)
2016 Cortex-R52(F)
2022 Cortex-R52+(F)
64-bit
Year Core
2020 Cortex-R82(F)

The ARM Cortex-R is a family of ARM cores implementing the R profile of the ARM architecture; that profile is designed for high performance hard real-time and safety critical applications. It is similar to the A profile for applications processing but adds features which make it more fault tolerant and suitable for use in hard real-time and safety critical applications.

Real time and safety critical features added include:

The Armv8-R architecture includes virtualization features similar to those introduced in the Armv7-A architecture. Two stages of MPU-based translation are provided to enable multiple operating systems to be isolated from one another under the control of a hypervisor.

Prior to the R82, introduced on 4 September 2020,[1] the Cortex-R family did not have a memory management unit (MMU). Models prior to the R82 could not use virtual memory, which made them unsuitable for many applications, such as full-featured Linux.[1] However, many real-time operating systems (RTOS), with an emphasis on total control, have traditionally regarded the lack of an MMU as a feature, not a bug.[1] On the R82, it may be possible to run a traditional RTOS in parallel with a paged OS such as Linux, where Linux takes advantage of the MMU for flexibility, while the RTOS locks the MMU into a direct translation mode on pages assigned to the RTOS so as to retain full predictability for real-time functions.[1]

ARM license

[edit]

Arm Holdings neither manufactures nor sells CPU devices based on its own designs, but rather licenses the core designs to interested parties. ARM offers a variety of licensing terms, varying in cost and deliverables. To all licensees, ARM provides an integrable hardware description of the ARM core, as well as complete software development toolset and the right to sell manufactured silicon containing the ARM CPU.

Silicon customization

[edit]

Integrated device manufacturers (IDM) receive the ARM Processor IP as synthesizable RTL (written in Verilog). In this form, they have the ability to perform architectural level optimizations and extensions. This allows the manufacturer to achieve custom design goals, such as higher clock speed, very low power consumption, instruction set extensions, optimizations for size, debug support, etc. To determine which components have been included in a particular ARM CPU chip, consult the manufacturer datasheet and related documentation.

Applications

[edit]

The Cortex-R is suitable for use in computer-controlled systems where very low latency and/or a high level of safety is required. An example of a hard real-time, safety critical application would be a modern electronic braking system in an automobile. The system not only needs to be fast and responsive to a plethora of sensor data input, but is also responsible for human safety. A failure of such a system could lead to severe injury or loss of life.

Other examples of hard real-time and/or safety critical applications include:

Certifications

[edit]

ARM Cortex-R52+ processor IP core achieved certification on 22 April 2024 of compliance with the requirements of:[2]

ARM Cortex-R5 and Cortex-R5F processor IP cores achieved certification on 22 March 2024 of compliance with the requirements of:[3]

  • Automotive Safety Integrity Level D defined by ISO 26262.
  • Safety Integrity Level 3 defined by IEC 61508.

See also

[edit]

References

[edit]
  1. ^ a b c d Salter, Jim (9 September 2020). "Arm's new Cortex-R82 is its first 64-bit real-time processor". arstechnica.com. Ars Technica. Retrieved 11 September 2020.
  2. ^ "Certificate No.: 968/FSP 2448.01/24" (PDF). TÜV Rheinland. Retrieved 2026-01-25.{{cite web}}: CS1 maint: url-status (link)
  3. ^ "Certificate No.: 968/FSP 1503.01/24" (PDF). TÜV Rheinland. Retrieved 2026-01-25.{{cite web}}: CS1 maint: url-status (link)
[edit]
ARM Cortex-R official documents
ARM
Core
Bit
Width
ARM
Website
ARM Technical
Reference Manual
ARM Architecture
Reference Manual
Cortex-R4(F) 32 Link Link ARMv7-R
Cortex-R5(F) 32 Link Link ARMv7-R
Cortex-R7(F) 32 Link Link ARMv7-R
Cortex-R8(F) 32 Link Link ARMv7-R
Cortex-R52(F) 32 Link Link ARMv8

ARMv8-R

Cortex-R52+(F) 32 Link Link ARMv8-R
Cortex-R82(F) 64 Link Link ARMv8-R (AArch64)
Migrating
Other

Source: Wikipedia. Article content is retrieved live through the MediaWiki API.

Wikipedia

ARM Cortex-R

The ARM Cortex-R is a family of 32-bit and 64-bit RISC ARM processor cores licensed by ARM Ltd. The cores are optimized for hard real-time and safety-critical applications. Cores in this family implement the ARM Real-time (R) profile, which is one of three architecture profiles, the other two being the Application (A) profile implemented by the Cortex-A family and the Microcontroller (M) profile implemented by the Cortex-M family. The ARM Cortex-R family of microprocessors currently consists of the Cortex-R4(F), Cortex-R5(F), Cortex-R7(F), Cortex-R8(F), Cortex-R52(F), Cortex-R52+(F), and the Cortex-R82(F).

MORE →
Wikipedia

STM32

STM32 is a family of 32-bit microcontroller and microprocessor integrated circuits made by STMicroelectronics. STM32 microcontrollers are grouped into related series that are based around the same 32-bit ARM processor core: Cortex-M0, Cortex-M0+, Cortex-M3, Cortex-M4, Cortex-M7, Cortex-M33, Cortex-M55, or Cortex-M85. Internally, each microcontroller consists of ARM processor core(s), flash memory, static RAM, a debugging interface, and various peripherals. In addition to its microcontroller lines, STMicroelectronics has introduced microprocessor (MPU) offerings such as the MP1 and MP2 series into the STM32 family. These processors are based around single or dual ARM Cortex-A cores combined with an ARM Cortex-M core. Cortex-A application processors include a memory management unit (MMU), enabling them to run advanced operating systems such as Linux.

MORE →
No preview image
Wikipedia

Hercules (microcontroller)

Hercules is a line of ARM architecture-based microcontroller from Texas Instruments built around one or more ARM Cortex cores. This "Hercules safety microcontroller platform" includes a series of microcontrollers specifically targeted for Functional Safety applications, through such hardware-base fault correction/detection features as dual cores that can run in lock-step, full path ECC, automated self testing of memory and logic, peripheral redundancy, and monitor/checker cores. This line includes the TMS470M, TMS570 and RM4 families. These families were "designed specifically for IEC 61508 and ISO 26262 safety critical applications". However, they differ significantly in the degree of support for these safety standards: TMS470 Value Line Transportation and Safety MCUs Supports Safety for IEC 61508 systems RM4 High Performance Industrial and Medical Safety MCUs Developed to Safety Standards IEC 61508 SIL-3 TMS570 High Performance Transportation and Safety MCUs Developed to Safety Standards IEC 61508 SIL-3 ISO 26262 ASIL D In particular, TMS570 support for ASIL D is accomplished through dual lock-step cores.

MORE →
Wikipedia

ARM architecture family

ARM (stylised in lowercase as arm) is a family of RISC instruction set architectures for computer processors. Arm Holdings develops the instruction set architecture and licenses it to other companies, who build the physical devices that use the instruction set. It also designs and licenses cores that implement these instruction set architectures. Due to their low costs, low power consumption, and low heat generation, ARM processors are useful for light, portable, battery-powered devices, including smartphones, laptops, and tablet computers, as well as embedded systems. However, ARM processors are also used for desktops and servers, including Fugaku, the world's fastest supercomputer from 2020 to 2022. With over 230 billion ARM chips produced, since at least 2003, and with its dominance increasing every year, ARM is the most widely used family of instruction set architectures. There have been several generations of the ARM design. The original ARM1 used a 32-bit internal structure but had a 26-bit address space that limited it to 64 MB of main memory. This limitation was removed in the ARMv3 series, which has a 32-bit address space, and several additional generations up to ARMv7 remained 32-bit. Released in 2011, the ARMv8-A architecture added support for a 64-bit address space and 64-bit arithmetic with its new 32-bit fixed-length instruction set. Arm Holdings has also released a series of additional instruction sets for different roles: the "Thumb" extensions add both 32- and 16-bit instructions for improved code density, while Jazelle added instructions for directly handling Java bytecode. More recent changes include the addition of simultaneous multithreading (SMT) for improved performance or fault tolerance.

MORE →
TOPIC OF THE DAY

Greenwood / Black Wall Street

Before the 1921 destruction of Tulsa’s Greenwood District, Black residents had created a remarkable center of business and community life. The district included stores, professional offices, entertainment venues and homes owned by Black citizens. Understanding Greenwood means learning what was built—not only what was burned.

MORE →
TRIVIA QUESTION OF THE DAY

Who was the first African-American woman millionaire in the United States?

Madam C.J. Walker