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Explore the people, places, events, achievements, struggles and stories that shaped our journey.
Movements, leaders, victories and the continuing fight for equality.
Innovation, patents, science, technology and world-changing contributions.
Pioneers, champions, Negro Leagues, records, activism and excellence.
Meet the people whose lives, choices and achievements shaped the journey.
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Moments that changed communities, movements, institutions and the nation.
In 1968 Shirley Chisholm became the first Black woman elected to the United States Congress. In 1972 she launched a campaign for the Democratic presidential nomination, breaking another political barrier.
MORE →Reflects the personal views, recollections, and perspective of the author, Mike Davis.
This is a personal recollection on the Move fire on May 13, 1985
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| GNU lightning | |
|---|---|
 | |
| Developer | GNU Project |
| Release | January 19, 2001[1] |
| Stable release | 2.2.3[2] 
/ 8 February 2024 |
| Operating system | Cross-platform |
| Platform | GNU |
| Type | Just-in-time compilation |
| License | 2007: LGPL-3.0-or-later[a] 2002: LGPL-2.1-or-later[b] |
| Website | Official website |
| Repository | |
GNU lightning is a free-software library for generating assembly language code (actually machine code) at run-time. Version 2.1.3, released in September 2019, supports backends for SPARC (32-bit), x86 (32- and 64-bit), MIPS, ARM (32- and 64-bit), ia64, HPPA, PowerPC (32-bit), Alpha, S390 and RISC-V (64-bit).[5][6]
The features GNU lightning provides make it useful for Just-in-Time Compilation. In comparison to libraries such as LLVM or libJIT, GNU lightning provides only a low-level interface for assembling from a standardized RISC assembly language—loosely based on the SPARC and MIPS architectures[7]—into the target architecture's machine language.
It does not provide register allocation, data-flow or control-flow analysis, or optimization.[citation needed] Starting from 2.x, it generates code via intermediate graph, rather than one by one from each of its standardized instructions. This change allows inter-instruction optimization such as register allocation and dead code elimination.[8]
GNU lightning's instruction set is based loosely on existing RISC architectures.
When required instructions handle data with these 9 types:
| Type | C equivalent |
|---|---|
| c | signed char |
| uc | unsigned char |
| s | short |
| us | unsigned short |
| i | int |
| ui | unsigned int |
| l | long |
| f | float |
| d | double |
GNU Smalltalk,[9] GNU Guile,[10] and CLISP[11] make use of GNU lightning for just-in-time compilation. GNU lightning was first developed as a tool to be used in GNU Smalltalk's dynamic translator from bytecodes to native code.[12] GNU Guile 2.9.2 and later stop using GNU lightning 2.x instead their own fork based on GNU lightning 1.4 for native code generation, because GNU lightning 2.x devotes more complexity to inter-instruction optimization.[13]
 | This free and open-source software article is a stub. You can help Wikipedia by adding missing information. |
Source: Wikipedia. Article content is retrieved live through the MediaWiki API.
GNU lightning is a free-software library for generating assembly language code (actually machine code) at run-time. Version 2.1.3, released in September 2019, supports backends for SPARC (32-bit), x86 (32- and 64-bit), MIPS, ARM (32- and 64-bit), ia64, HPPA, PowerPC (32-bit), Alpha, S390 and RISC-V (64-bit).
An Interrupt Request Level (IRQL) is a hardware-independent means with which Windows prioritizes interrupts that come from the system's processors. On processor architectures on which Windows runs, hardware generates signals that are sent to an interrupt controller. The interrupt controller sends an interrupt request (or IRQ) to the CPU with a certain priority level, and the CPU sets a mask that causes any other interrupts with a lower priority to be put into a pending state, until the CPU releases control back to the interrupt controller. If a signal comes in at a higher priority, then the current interrupt will be put into a pending state; the CPU sets the interrupt mask to the priority and places any interrupts with a lower priority into a pending state until the CPU finishes handling the new, higher priority interrupt. Windows maps not only hardware interrupt levels to its internal interrupt table but also maps software interrupts. The mappings in this table are called Interrupt Request Levels, or IRQLs, and a separate IRQL is kept for each processor in a multiprocessor system. The IRQL values are specific to the x86, IA64 and AMD64 processor architectures that Windows can run on, though theoretically they can support other CPUs that use a similar interrupt scheme (such as the DEC Alpha and MIPS, which were supported briefly on early versions of Windows). This means that APCs (asynchronous procedure calls), user threads and kernel mode operations can be interrupted, and the system must run them at an IRQL lower than the thread scheduler (or "dispatcher").
Itanium (; eye-TAY-nee-əm) is a discontinued family of 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). The Itanium architecture originated at Hewlett-Packard (HP), and was later jointly developed by HP and Intel. Launching in June 2001, Intel initially marketed the processors for enterprise servers and high-performance computing systems. In the concept phase, engineers said "we could run circles around PowerPC...we could kill the x86". Early predictions were that IA-64 would expand to the lower-end servers, supplanting Xeon, and eventually penetrate into the personal computers, eventually to supplant reduced instruction set computing (RISC) and complex instruction set computing (CISC) architectures for all general-purpose applications. When first released in 2001 after a decade of development, Itanium's performance was disappointing compared to better-established RISC and CISC processors. Emulation to run existing x86 applications and operating systems was particularly poor. Itanium-based systems were produced by HP and its successor Hewlett Packard Enterprise (HPE) as the Integrity Servers line, and by several other manufacturers. In 2008, Itanium was the fourth-most deployed microprocessor architecture for enterprise-class systems, behind x86-64, Power ISA, and SPARC. In February 2017, Intel released the final generation, Kittson, to test customers, and in May began shipping in volume. It was only used in mission-critical servers from HPE. In 2019, Intel announced that new orders for Itanium would be accepted until January 30, 2020, and shipments would cease by July 29, 2021. This took place on schedule. Itanium never sold well outside enterprise servers and high-performance computing systems, and the architecture was ultimately supplanted by competitor AMD's x86-64 (also called AMD64) architecture. x86-64 is a compatible extension to the 32-bit x86 architecture, implemented by, for example, Intel's own Xeon line and AMD's Opteron line. By 2009, most servers were being shipped with x86-64 processors, and they dominate the low cost desktop and laptop markets which were not initially targeted by Itanium. In an article titled "Intel's Itanium is finally dead: The Itanic sunken by the x86 juggernaut" Techspot declared "Itanium's promise ended up sunken by a lack of legacy 32-bit support and difficulties in working with the architecture for writing and maintaining software", while the dream of a single dominant ISA would be realized by the AMD64 extensions.
x86-64 (also known as AMD64, x86_64, x64 and, rarely, Intel 64) is a 64-bit extension of the x86 instruction set. It was announced in 1999 and first available in the AMD Opteron family in 2003. It introduces two new operating modes: 64-bit mode and compatibility mode, along with a new four-level paging mechanism. In 64-bit mode, x86-64 supports significantly larger amounts of virtual and physical memory compared to its 32-bit predecessors, allowing computer programs to utilize more memory. The architecture increases the number of general-purpose registers from 8 to 16, and extends each of the register's width (capacity) to 64 bits. Floating-point arithmetic is supported through mandatory SSE2 instructions in 64-bit mode. While registers for older floating-point implementations—the x87 and MMX—are still available, they are generally superseded by 128-bit vector registers for the SSE instruction set. These vector registers are capable of storing two double-precision, or up to four single-precision floating-point numbers, along with various integer formats. In 64-bit mode, instructions are modified to support 64-bit operands and 64-bit addressing mode. The x86-64 architecture defines a compatibility mode that allows 16-bit and 32-bit user applications to run unmodified alongside 64-bit applications, provided the 64-bit operating system supports them. Since the full x86-32 instruction sets remain implemented in hardware without the need for emulation, these older executables can run with little or no performance penalty, while newer or modified applications can take advantage of new features of the processor design to achieve performance improvements. Also, processors supporting x86-64 still power on in real mode to maintain backward compatibility with the original 8086 processor, as has been the case with x86 processors since the introduction of protected mode with the 80286. The original specification, created by AMD and released in 2000, has been implemented by AMD, Intel, and VIA. The AMD K8 microarchitecture, in the Opteron and Athlon 64 processors, was the first to implement it. This was the first significant addition to the x86 architecture designed by a company other than Intel. Intel was forced to follow suit and introduced a modified NetBurst family which was software-compatible with AMD's specification. VIA Technologies introduced x86-64 in their Isaiah microarchitecture, with the VIA Nano. The x86-64 architecture was quickly adopted for desktop and laptop personal computers and servers which were commonly configured for 16 GiB (gibibytes) of memory or more. It has effectively replaced the discontinued Intel Itanium architecture (formerly IA-64), which was originally intended to replace the x86 architecture. x86-64 and Itanium are not compatible on the native instruction set level, and operating systems and applications compiled for one architecture cannot be run on the other natively. In October 2024, the x86 Ecosystem Advisory Group was formed jointly by Intel and AMD. Goals included the enhancement of software consistency and standardizing x86 interfaces and features.
Before the 1921 destruction of Tulsa’s Greenwood District, Black residents had created a remarkable center of business and community life. The district included stores, professional offices, entertainment venues and homes owned by Black citizens. Understanding Greenwood means learning what was built—not only what was burned.
MORE →The Greenwood District.
